COSET PARTITION BASED CONSTRUCTION METHOD FOR (n,n(n-1),n-1) PERMUTATION GROUP CODE AND CODE SET GENERATOR THEREOF

ABSTRACT

A construction method for a (n,n(n−1),n−1) permutation group code based on coset partition is provided. The presented (n,n(n−1),n−1) permutation group code has an error-correcting capability of d−1 and features a strong anti-interference capability for channel interferences comprising multi-frequency interferences and signal fading. As n is a prime, for a permutation code family with a minimum distance of n−1 and a code set size of n(n−1), the invention provides a method of calculating n−1 orbit leader permutation codewords by On={αo1}α=1n-1(mod n) and enumerating residual codewords of the code set by Pn=CnOn={(l1)n-1On}={(rn)n-1On}. Besides, a generator of the code set thereof is provided. The (n,n(n−1),n−1) permutation group code of the invention is an algebraic-structured code, n−1 codewords of the orbit leader array can be obtained simply by adder and (mod n) calculator rather than multiplication of positive integers. Composition operations of the cyclic subgroup Cn acting on all permutations oα of the orbit leader permutation array On are replaced by well-defined cyclic shift composite operation functions (l1)n-1 and (rn)n-1 so that the action of the cyclic group acting on permutations is realized by a group of cyclic shift registers.

FIELD OF THE INVENTION

The invention relates to a technical field of channel coding incommunication transmission, and more particularly to a constructionmethod for a (n,n(n−1),n−1) permutation group code based on cosetpartition and a codebook generator thereof.

BACKGROUND OF THE INVENTION

Multiple interferences comprising multipath fading, permanentnarrow-band noise, broadband impulse noise and colored background noisesmay coexist in a power line channel, which is uncommon for wireless andwired channels. Therefore, information transmission reliability is hardto be guaranteed by applying existing technology of wireless and wiredcommunications directly to power line carrier communication channels,and it is necessary to propose a solution of error-correcting codes withhigher reliability to interferences of multiple forms and multiplefrequencies in power line carrier communication. Besides,error-correcting codes with higher reliability are still needed forwider wireless transmission environment with interferences of multipleforms and multiple frequencies.

In 2000, Vinck introduced permutation codes into power line carriercommunication, and a corresponding dissertation “‘Coded modulation forpower line communications’, AEU int. J. Electron. Commun., vol. 54, no.1, pp: 45-49, 2000” discloses a power line carrier coded modulationmethod combining permutation code and M-dimension FSK modulation, wheretime diversity and frequency diversity are introduced simultaneously ata transmitter terminal according to redundancy of permutation codes toincrease capability of resisting fading and interferences of multiplefrequencies, and a receiving signal is detected by a constant envelopedemodulation algorithm at a receiver terminal to form a simplenon-coherent demodulation method. It should be noted that Vinck came toa conclusion that permutation codes have an error-correcting capabilityof d−1 rather than └(d−1)/2┘ through analyzing a permutation code withcode length of 4. However, Vinck failed to provide an effectiveconstruction method for permutation codes. At present, permutation codeswith an error-correcting capability of d−1 develop slowly and are notapplied in practice for design methods for algebraic structures ofpermutation codes are rare and more particularly, the problem of theirexecutable circuits has not been effectively solved yet.

SUMMARY OF THE INVENTION

In view of the above-mentioned problems, it is an objective of theinvention to provide a construction method of (n,n(n−1),n−1) permutationgroup code based on coset partition and a codebook generator thereof.More specifically, there is provided an algebraic structural designmethod and a codebook enumerator for permutation codes with a codelength of n, a minimum distance of n−1, a cardinality of n(n−1) and anerror-correcting capability of d−1=n−2. For multiple interferencescomprising multipath fading, permanent narrow-band noise, broadbandimpulse noise and colored background noises may coexist in a power linechannel, the invention provides a design method for an error-correctingcode capable of resisting the mixed interferences. Besides, thepermutation group code of the invention features a stronganti-interference capability for multi-frequency interferences inwireless communication and malicious frequency interferences from ahuman being, and is capable of protecting transmitted signals under thecircumstance with low requirement for data rate and coexisted deepfading and various mixed frequency interferences. To achieve the aboveobjective, according to one embodiment of the invention, there isprovided a construction method of the (n,n(n−1),n−1) permutation groupcodes based on coset partition, wherein a construction of thispermutation code with a code length of n, a minimum distance of n−1 anda code size of n(n−1) is expressed by P_(n)={{p_(βα)}_(β1) ^(n)}_(α=1)^(n-1)=C_(n)O_(n)={{C_(n)o₁}, (C_(n)o₂}, . . . ,{C_(n)o_(n-1)┐)={{c_(β)∘o_(α)}_(β=1) ^(n)}_(α=1) ^(n-1),P_(n)=C_(n)O_(n) represents that C_(n) is a coset of the subgroup O_(n)and O_(n) is also a coset of the subgroup C_(n), P_(n)={{C_(n)o₁},{C_(n)o₂}, . . . , {C_(n)o_(n-1)}} represents dividing P_(n) into n−1cosets by the subgroup C_(n), each coset {C_(n)o_(α)} forms an orbit oran cyclic Latin square (C-LS) of a permutation o_(α),P_(n)={{p_(βα)}_(β=1) ^(n)}_(α=1) ^(n-1)}={{c_(β)∘o_(α)}_(β=1)^(n)}_(α=1) ^(n-1) represents a permutation code and each codewordP_(βα) is generated by composition operation of a permutation c_(β) ofthe subgroup C_(n) and a permutation o_(α) of the subgroup O_(n), α=1,2, . . . n−1, and β=1, 2, . . . n.

According to another embodiment of the invention, there is provided agenerator of the (n,n(n−1),n−1) permutation group code based on cosetpartition, comprising an orbit leader array generator, a flash memoryand a cyclic-bidirectional-shift register group, wherein

the orbit leader array generator is operable for performing an operationof O_(n)={αo₁}_(α=1) ^(n-1)(mod n) to generate n−1 orbit leaderpermutations;the flash memory is operable for storing output results of the orbitleader array generator and the cyclic-bidirectional-shift registergroup; andthe cyclic-bidirectional-shift register group is operable for performingthe operation of (l₁)^(n-1) or (r_(n))^(n-1) acting on a permutation bycalculating an orbit {(l₁)^(n-1)o_(α)} or {(r_(n))_(n-1)o_(α))} of anorbit leader permutation o_(α), and a code set {(l₁)^(n-1)O_(n)} or{(r_(n))^(n-1)O_(n)}, where α=1, 2, . . . , n−1.

The (n,n(n−1),n−1) permutation group code based on coset partition ofthe invention is an algebraic-structured code, the orbit leaderpermutation codewords of the code set can be obtained simply by adderand (mod n) calculator instead of complex composition operations, andthe whole code set can be realized by a group of cyclic shift registers.As a non-binary error-correcting code, the permutation code has anerror-correcting capability of d−1, two times that of non-binaryerror-correcting codes in prior art. Demodulation can be realized simplyby a noncoherent constant envelop detecting technology at a receiverterminal combining permutation code with MFSK modulation technology, andsignal transmission reliability can be guaranteed for communicationchannels with deep fading and mixed frequency noises.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

FIG. 1 is an overall block diagram of a generator for a (n,n(n−1),n−1)permutation group code of the invention;

FIG. 2 is a schematic diagram of an orbit leader array generator of theinvention;

FIG. 3 is a schematic diagram of a flash memory of the invention; and

FIG. 4 is a schematic diagram of a cyclic-bidirectional-shift registergroup of the invention.

SPECIFIC EMBODIMENTS OF THE INVENTION

For clear understanding of the objectives, features and advantages ofthe invention, detailed description of the invention will be given belowin conjunction with accompanying drawings and specific embodiments. Itshould be noted that the embodiments are only meant to explain theinvention, and not to limit the scope of the invention.

Basic Principles

Basic principles of a (n,n(n−1),n−1) permutation group code based oncoset partition of the invention are given below.

Code symbols can take values in two finite fields, namely, Z_(n) ⁰={0,1, . . . , n−1} represents a finite field of order n containing element0, and Z_(n) ¹={1, 2, . . . , n}represents a finite positive integerfield of order n containing no element 0, and is also a cyclic group oforder n.

Calling a set formed by all n! permutations of n elements in Z_(n) ⁰ orZ_(n) ¹ a symmetric group S_(n)={π₁, . . . , π_(k), . . . , π_(n!)}, anelement of S_(n) can be represented by a permutation π_(k)=[a₁ . . .a_(i) . . . a_(n)], elements of a permutation by a₁ . . . a_(i) . . .a_(n)∈Z_(n) ⁰ or a₁ . . . a_(i) . . . a_(n)∈Z_(n) ¹, degree (dimension)of a permutation is |π_(k)|=n, and cardinality (order) of the symmetricgroup is |S_(n)|=n!. Let π₀=e=[a₁a₂ . . . a_(n)]=[01 . . . n−1] orπ₀=e=[a₁a₂ . . . a_(n)]=[12 . . . n] represent an identity element ofthe symmetric group S_(n), where [a₁a₂ . . . a_(n)] represent apermutation in S_(n), and (a₁a₂ . . . a_(n)) represents a permutationoperator.

A group H is a cyclic permutation group if H can be generated by asingle element, i.e., there is an element x∈H such that H={x^(i)|i∈Z_(n)¹, x, x^(i)∈S_(n)}. We shall write H=<x> and say that H is generated byx or x is a generator of H.

Let γ=(γ₂) be a cyclic permutation group of n permutation operators, itsgenerator is γ₂=(a₂a₃ . . . a_(n)a₁), and its cardinality is |γ|=n. Ifmaking the operator set γ=(γ₂) act on a permutation π=[a₁ . . . a_(i) .. . a_(n)], we get {γπ}={{γ₂, γ₃, . . . , γ_(n), γ₁}[a₁ . . . a_(i) . .. a_(n)]}={<γ₂>π}={{γ₂, γ₂ ², . . . , γ_(n), γ₁}[a₁ . . . a_(i) . . .a_(n)]}, then {γπ} is regarded as an orbit containing permutation πunder the action of cyclic permutation group γ and element number of theorbit {γπ} is |{γπ}|=n.

Basic structure of the (n,n(n−1),n−1) permutation group code based oncoset partition is provided by the following two Theorems and a Lemmawithout a proof.

Lemma 1 [construction of C_(n)]: C_(n)={c₁, c₂, . . . , c_(n)}=<c₂> is asubgroup of S_(n) and also a cyclic permutation group with minimumdistance d_(C) _(n) =n and cardinality |C_(n)|=n if and only if (i)C_(n)={γπ}={

γ₂

[a₁a₂ . . . a_(n)]}; (ii) its subscript is specified to keep consistentwith the value of the first element of each permutation in C_(n), i.e.,c₁=γ₁π=c₂ ^(n)=γ₂ ^(n)π=(a₂a₃ . . . a_(n)a₁)^(n)[a₁a₂ . . .a_(n)]=[a₁a₂, . . . a_(n)], c₂=γ₂π=[a₂a₃ . . . a_(n)a₁], c₃=γ₃π=c₂ ²=γ₂²π=(a₂a₃ . . . a_(n)a₁)²[a₁a₂ . . . a_(n)]=[a₃a₄ . . . a_(n)a₁a₂], . . ., c_(n)=γ_(n)π=c₂ ^(n-1)=γ₂ ^(n-1)π=(a₂a₃ . . . a_(n)a₁)^(n-1)[a₁a₂ . .. a_(n)]=[a_(n)a₁a₂ . . . a_(n-1)].

Theorem 2 [construction of O_(n)]: Let O_(n) be a (n−1)×n permutationarray or a set formed by n−1 permutations, and constructO_(n)={o_(α)}_(α=1) ^(n-1)={α·o₁}_(α=1) ^(n-1), where o₁=[12 . . . n] isan identity permutation, and α=1, 2, . . . , n−1 is the row index ofpermutation array O_(n), also as an index of the number of permutationsin the set O_(n). If and only if i) n is a prime; ii) for all α=1, 2, .. . , n−1, we have (α·n)(mod n)=n; then the set O_(n) is a subgroup ofS_(n), all elements of the nth column in the array O_(n) are n, and theminimum distance of O_(n) is d_(O) _(n) =n−1 and its cardinality is|O_(n)|=n−1.

Theorem 3 [constructing a permutation group code P_(n) by C_(n) andO_(n)]: For any prime n, let P_(n)={p₁₁, . . . , p_(βα), . . . ,p_(n(n−1))} be a nontrivial subgroup of S_(n), we use the composition ofC_(n) and O_(n) to construct P_(n), i.e., P_(n)={{p_(βα)}_(β=1)^(n)}_(α=1) ^(n-1)=C_(n)O_(n)={{c_(β)∘o_(α)}_(β=1) ^(n)}_(α=1) ^(n-1),where c_(β)∘o_(α) denotes a composition operation between a permutationc_(β)∈C_(n) and a permutation o_(α)∈O_(n). If C_(n)∩O_(n)=e=[12 . . .n], then P_(n) is a permutation group code with the minimum Hammingdistance d_(P) _(n) =n−1 and cardinality |P_(n)|=n(n−1) in which C_(n)is a left coset of O_(n) and O_(n) is a right coset of C_(n).

Example 1

Let n=5, and C₅ is obtained by Lemma 1 as follows:

$C_{5} = {\begin{Bmatrix}{c_{1},} \\{c_{2},} \\{c_{3},} \\{c_{4},} \\c_{5}\end{Bmatrix} = {{\langle c_{2}\rangle} = {\begin{Bmatrix}{c_{2}^{5},} \\{c_{2}^{1},} \\{c_{2}^{2},} \\{c_{2}^{3},} \\c_{2}^{4}\end{Bmatrix} = {{\langle{\gamma_{2}\pi}\rangle} = {\begin{Bmatrix}{{\gamma_{2}^{5}\pi},} \\{{\gamma_{2}^{1}\pi},} \\{{\gamma_{2}^{2}\pi},} \\{{\gamma_{2}^{3}\pi},} \\{\gamma_{2}^{4}\pi}\end{Bmatrix} = {\begin{Bmatrix}{{( {a_{2}a_{3}a_{4}a_{5}a_{1}} )^{5}\lbrack {a_{1}a_{2}a_{3}a_{4}a_{5}} \rbrack},} \\{{( {a_{2}a_{3}a_{4}a_{5}a_{1}} )\lbrack {a_{1}a_{2}a_{3}a_{4}a_{5}} \rbrack},} \\{{( {a_{2}a_{3}a_{4}a_{5}a_{1}} )^{2}\lbrack {a_{1}a_{2}a_{3}a_{4}a_{5}} \rbrack},} \\{{( {a_{2}a_{3}a_{4}a_{5}a_{1}} )^{3}\lbrack {a_{1}a_{2}a_{3}a_{4}a_{45}} \rbrack},} \\{( {a_{2}a_{3}a_{4}a_{5}a_{1}} )^{4}\lbrack {a_{1}a_{2}a_{3}a_{4}a_{5}} \rbrack}\end{Bmatrix} = {\begin{Bmatrix}{{a_{1}a_{2}a_{3}a_{4}a_{5}},} \\{{a_{2}a_{3}a_{4}a_{5}a_{1}},} \\{{a_{3}a_{4}a_{5}a_{1}a_{2}},} \\{{a_{4}a_{5}a_{1}a_{2}a_{3}},} \\{a_{5}a_{1}a_{2}a_{3}a_{4}}\end{Bmatrix} = \begin{Bmatrix}{12345,} \\{23451,} \\{34512,} \\{45123,} \\51234\end{Bmatrix}}}}}}}}$

O₅ in a form of permutation array is obtained by Theorem 2 as follows:

$O_{5} = {\begin{bmatrix}o_{1} \\o_{2} \\o_{3} \\o_{4}\end{bmatrix} = {\begin{bmatrix}{1o_{1}} \\{1o_{2}} \\{3o_{1}} \\{4o_{1}}\end{bmatrix} = {{\begin{bmatrix}{1 \cdot 1} & {1 \cdot 2} & {1 \cdot 3} & {1 \cdot 4} & {1 \cdot 5} \\{2 \cdot 1} & {2 \cdot 2} & {2 \cdot 3} & {2 \cdot 4} & {2 \cdot 5} \\{3 \cdot 1} & {3 \cdot 2} & {3 \cdot 3} & {3 \cdot 4} & {3 \cdot 5} \\{4 \cdot 1} & {4 \cdot 2} & {4 \cdot 3} & {4 \cdot 4} & {4 \cdot 5}\end{bmatrix}( {{mod}\mspace{14mu} 5} )} = {{\begin{bmatrix}1 & 2 & 3 & 4 & 5 \\2 & 4 & 6 & 8 & 10 \\3 & 6 & 9 & 12 & 15 \\4 & 8 & 12 & 16 & 20\end{bmatrix}( {{mod}\mspace{14mu} 5} )} = \begin{bmatrix}1 & 2 & 3 & 4 & 5 \\2 & 4 & 1 & 3 & 5 \\3 & 1 & 4 & 2 & 5 \\4 & 3 & 2 & 1 & 5\end{bmatrix}}}}}$

So that O₅ in a form of set is obtained as follows:

$O_{5} = {\begin{Bmatrix}o_{1} \\o_{2} \\o_{3} \\o_{4}\end{Bmatrix} = {\begin{Bmatrix}{{a_{1}a_{2}a_{3}a_{4}a_{5}},} \\{{a_{2}a_{4}a_{1}a_{3}a_{5}},} \\{{a_{3}a_{1}a_{4}a_{2}a_{5}},} \\{a_{4}a_{3}a_{2}a_{1}a_{5}}\end{Bmatrix} = {\begin{Bmatrix}{12345,} \\{24135,} \\{31425,} \\43215\end{Bmatrix}.}}}$

Let c₁=o₁=e=[12345], and P₅ is obtained by Theorem 3 as follows:

$P_{5} = {\{ \{ p_{\beta\alpha} \}_{\beta = 1}^{5} \}_{\alpha - 1}^{4} = {\{ {\{ {C_{5}o_{1}} ),\{ {C_{5}o_{2}} \},\{ {C_{5}o_{3}} \},\{ {C_{5}o_{4}} \}} \} = {\{ \{ {c_{\beta} \circ o_{\alpha}} \}_{\beta = 1}^{5} \}_{\alpha = 1}^{4} = {\begin{Bmatrix}{{c_{1} \circ o_{1}},} & {{c_{1} \circ o_{2}},} & {{c_{1} \circ o_{3}},} & {{c_{1} \circ o_{4}},} \\{{c_{2} \circ o_{1}},} & {{c_{2} \circ o_{2}},} & {{c_{2} \circ o_{3}},} & {{c_{2} \circ o_{4}},} \\{{c_{3} \circ o_{1}},} & {{c_{3} \circ o_{2}},} & {{c_{3} \circ o_{3}},} & {{c_{3} \circ o_{4}},} \\{{c_{4} \circ o_{1}},} & {{c_{4} \circ o_{2}},} & {{c_{4} \circ o_{3}},} & {{c_{4} \circ o_{4}},} \\{{c_{5} \circ o_{1}},} & {{c_{5} \circ o_{2}},} & {{c_{5} \circ o_{3}},} & {{c_{5} \circ o_{4}},}\end{Bmatrix} = {\begin{Bmatrix}{{a_{1}a_{2}a_{3}a_{4}a_{5}},} & {{a_{2}a_{4}a_{1}a_{3}a_{5}},} & {{a_{3}a_{1}a_{4}a_{2}a_{5}},} & {{a_{4}a_{3}a_{2}a_{1}a_{5}},} \\{{a_{2}a_{3}a_{4}a_{5}a_{1}},} & {{a_{3}a_{4}a_{2}a_{4}a_{1}},} & {{a_{4}a_{2}a_{5}a_{3}a_{1}},} & {{a_{5}a_{4}a_{3}a_{2}a_{1}},} \\{{a_{3}a_{4}a_{5}a_{1}a_{2}},} & {{a_{4}a_{1}a_{3}a_{5}a_{2}},} & {{a_{5}a_{3}a_{1}a_{4}a_{2}},} & {{a_{1}a_{5}a_{4}a_{3}a_{2}},} \\{{a_{4}a_{5}a_{1}a_{2}a_{3}},} & {{a_{5}a_{2}a_{4}a_{1}a_{3}},} & {{a_{1}a_{4}a_{2}a_{5}a_{3}},} & {{a_{2}a_{1}a_{5}a_{4}a_{3}},} \\{{a_{5}a_{1}a_{2}a_{3}a_{4}},} & {{a_{1}a_{3}a_{5}a_{2}a_{4}},} & {{a_{2}a_{5}a_{3}a_{1}a_{4}},} & {a_{3}a_{2}a_{1}a_{5}a_{4}}\end{Bmatrix} = \begin{Bmatrix}{12345,} & {24135,} & {31425,} & {43215,} \\{23451,} & {35241,} & {42531,} & {54321,} \\{34512,} & {41352,} & {53142,} & {15432,} \\{45123,} & {52413,} & {14253,} & {21543,} \\{51234,} & {13524,} & {25314,} & 32154\end{Bmatrix}}}}}}$

Example 1 illustrates P₅ is a permutation group code with a code lengthof 5, a minimum distance of 4, a code set size of 20 and anerror-correcting capability of 3, and it can be seen that P₅ is formedby four orbits {C₅o₁}, {C₅o₂}, {C₅o₃}, {C₅o₄}.

Technical Solution

It is formed by two parts. The first part covers a construction methodfor a (n,n(n−1),n−1) permutation group code based on coset partition,and the second part covers a generator of this permutation group codethereof.

Part 1: a construction method for a (n,n(n−1),n−1) permutation groupcode based on coset partition.

In terms of Lemma 1 and Theorems 2 and 3, in the construction method fora (n,n(n−1),n−1) permutation group code based on coset partition, allcodewords in the code set are calculated by P_(n)={{p_(βα)}_(β=1)^(n)}_(α=1) ^(n-1)=C_(n)O_(n)={{C_(n)o₁}, (C_(n)o₂), . . . ,{C_(n)o_(n-1)}}={{c_(β)∘o_(α)}_(α=1) ^(n-1)}_(β=1) ^(n), where P_(n) isa non-trivial subgroup of a symmetric group S_(n), with a size of|P_(n)|=n(n−1) and a minimum distance of d_(|P) _(n) _(|), =n−1,C_(n)={c₁, . . . , c_(β), . . . , c_(n)}=

c₂

is a subgroup of P_(n) and also a cyclic group with a size of |C_(n)=nand a minimum distance of d_(|C) _(n) _(|)=n, β=1, 2, . . . , n,O_(n)={o₁, . . . , o_(α), . . . , o_(n-1)} is another subgroup of P_(n)different from C_(n) and also called as an orbit leader array of the(n,n(n−1),n−1) permutation group code, with a size of |O_(n)|=n−1 and aminimum distance of d_(|O) _(n) _(|)=n−1, α=1, 2, . . . , n−1, andintersection of C_(n) and O_(n) is an identity permutation(C_(n)∩O_(n)=e). The code set P_(n) is divided into n−1 cosets by thesubgroup C_(n) (P_(n)={C_(n)o₁, C_(n)o₂, . . . , C_(n)o_(n-1)}), eachcoset {C_(n)o_(α)} forms an orbit or an cyclic Latin square (C-LS) of apermutation o_(α).

Each codeword of the code set is calculated by p_(βα)=c_(β)∘o_(α)representing a composition operation between a permutation c_(β)∈C_(n)and a permutation o_(α)∈O_(n), which is unfavorable for hardwarerealization, and therefore a circuit executable permutation operationfunction should be constructed. Since C_(n) is a cyclic group, it ispossible to substitute cyclic shift operation of a permutation for theaction of C_(n), so that composition operation of two permutations areequivalently transferred to cyclic shift operation of being able to beperformed by basic unit circuit namely cyclic shift register. Therefore,operation function and composite operation function are defined first asfollows.

Construction of Operation Function

Let T be a set of all operation functions available acting on apermutation, construct a right-shift operation function setT_(right)={r₂, r₃, . . . , r_(n-1), r_(n)}⊂T, where each elementr_(i)∈T_(right) is a function r_(i):S_(n)→S_(n) defined byr_(i)π=r_(i)[a₁ . . . a_(i) . . . a_(n)]=[a_(i)a₁ . . . a_(i−1)a_(i+1),. . . a_(n)]∈S_(n), and r_(i)∈T_(right) is called as a partial cyclicright-shift operation function of a permutation. Especially for i=n, wehave r_(n)π=r_(n)[a₁a₂ . . . a_(n)]=[a_(n)a₁a₂ . . . a_(n-1)]∈S_(n) andr_(n) is called as a cyclic-right-shift operation function of apermutation. Similarly, construct a left-shift operation function setT_(left)={l₁, l₂, . . . , l_(n-1)}⊂T, where each element l_(j)∈T_(left)is a function l_(j):S_(n)→S_(n) defined by l_(j)π=l_(j)[a₁ . . . a_(j) .. . a_(n)]=[a₁ . . . a_(j−1)a_(j+1) . . . a_(n)a_(j)]∈S_(n), andl_(j)∈T_(left) is called as a partial cyclic left-shift operationfunction of a permutation. Especially for j=1, we have l₁π=l₁[a₁a₂ . . .a_(n)]=[a₂a₃ . . . a_(n-1)a_(n)a₁]∈S_(n) and l₁ is called as acyclic-left-shift operation function of a permutation.

Construction of Cyclic Shift Composite Operation Function

Arrange part or all operation functions of the set T_(left) or T_(right)in a string or consecutive multiplication of powers of differentfunctions, so that the operation function string or the product offunction powers forms a composite operation function represented asƒ_(CF)(u,Λ), where u is the number of operation functions in thecomposite operation function ƒ_(CF)(u,Λ), and Λ is an arranging rule ofthe operation functions, which is: some a function is repeatedly usedfor λ−1 times, and as λ=n, a left cycle composite operation function isconstructed as

${{f_{{CF} - 1}( {{n - 1},\Lambda} )} = {\underset{\underset{n - 1}{}}{l_{1}l_{1}\ldots \; l_{1}} = ( l_{1} )^{n - 1}}},$

and a right cycle composite operation function is constructed as

${f_{{CF} - r}( {{n - 1},\Lambda} )} = {\underset{\underset{n - 1}{}}{r_{n}r_{n}\ldots \; r_{n}} = {( r_{n} )^{n - 1}.}}$

Performing the two composite operation functions on a permutationπ=[a₁a₂ . . . a_(n)] respectively, two sets of n permutations areobtained as {(l₁)^(n-1)π}

{π, l₁π, l₁ ²π, . . . , l₁ ^(n-1)π} and {(r_(n))^(n-1)π}

{π, r_(n)π, r_(n) ²π, . . . , r_(n) ^(n-1)π}. {(l₁)_(n-1)π} and{(r_(n))^(n-1)π} are two orbits of the permutation π as the orbit{C_(n)π}, we have {C_(n)π}={(l₁)^(n-1)π}={(r_(n))^(n-1)π}, namely, threeorbits obtained by the three different operations form equivalence classbut corresponding C-LSs are not equal each other because of differentarrangement of permutations in these orbits.

As a result, the cyclic group C_(n) of the code set P_(n)={C_(n)O_(n)}can be replaced by the left cycle composite operation function(l₁)^(n-1) or the right cycle composite operation function(r_(n))^(n-1), each orbit {C_(n)o_(α)} is obtained by{C_(n)o_(α)}={(r_(n))_(n-1)o_(α)}={(l₁)^(n-1)o_(α)}, the expressionenumerating all codewords is,P_(n)=C_(n)O_(n)={(r_(n))^(n-1)O_(n)}={{(r_(n))^(n-1)o₁},{(r_(n))^(n-1)o₂}, . . . ,{(r_(n))^(n-1)o_(n-1)}}={(l₁)^(n-1)O_(n)}={{(l₁)^(n-1)o₁},{(l₁)^(n-1)o₂}, . . . , {(l₁)^(n-1)o_(n-1)}}. Structure features of theorbit leader array O_(n) provided by Theorem 2 are analyzed below andseveral different design methods are provided thereafter.

Structure Features of the Orbit Leader Array O_(n):

An orbit leader array of the presented (n,n(n−1),n−1) permutation groupcode has the following features: first, it is an array of (n−1)×n, eachrow thereof is a permutation of S_(n), and an unique column thereofcontains a same element a_(k)=k, where k,a_(k)∈Z_(n) ⁰ or k,a_(k)∈Z_(n)¹; second, removing the column containing the same element, residualrows and columns constitute a Latin square with a size of (n−1)×(n−1);and third, each row of the orbit leader array O_(n) has n differentadjacent pairs (a_(μ),a_(v)) containing cyclic adjacent pairs, and theorbit leader array O_(n) itself contains n(n−1) different adjacent (orcyclic adjacent) pairs, μ, v, a_(μ), a_(v)∈Z_(n) ⁰ or μ, v, a_(μ),a_(v)∈Z_(n) ¹, a_(μ)≠a_(v), and μ≠v. Generally, n(n−1) different pairsin a form of (a_(μ),a_(v)) can be obtained as constructed by n positiveintegers, which is a sufficient condition for the orbit leader arraycontaining n(n−1) different adjacent pairs.

Design Method of the Orbit Leader Array O_(n):

An orbit leader array meeting the above three structure features can becalculated by explicit expressions, and the following two design methodscan be realized by hardwares for Theorem 2.

Method 1: A Permutation Contains Element 0

Let a_(α) ₁ _(,β) ₁ ∈Z_(n) ⁰={0, 1, . . . , n−1} denote an element inthe α₁th row and the β₁th column of an array O_(n1), where α₁=0, 1, . .. , n−2 denotes the row index of the array O_(n1), β₁=0, 1, . . . , n−1denotes the column index of the array O_(n1), and k₁=0, 1, . . . , n−1denotes that all elements in the k₁th column of the array O_(n1) equalk₁; as n is a prime, let a modular n of xn equal 0 if a_(α) ₁ _(,β) ₁ isa multiple of n, namely a_(α) ₁ _(,β) ₁ =xn(mod n)=0, where x could beany integer, and calculate each element of each permutation of the orbitleader array O_(n1) by:

a _(α) ₁ _(,β) ₁ (k)=[(α₁+1)×(β₁ −k ₁)+k ₁](mod n)  (i)

O _(n1)(k)={o ₀ ,o ₁ , . . . ,o _(n-2) }={{a _(α) ₁ _(,β) ₁ (k ₁)}_(α) ₁₌₀ ^(n-2)}_(β) ₁ ₌₀ ^(n-1)(k ₁=0,1, . . . ,n−1)  (ii)

Method 2: A Permutation Contains No Element 0

Let a_(α) ₂ _(,β) ₂ ∈Z_(n) ¹={1, 2, . . . , n} denote an element in theα₂th row and the β₂th column of an array O_(n2), where α₂=1, 2, . . . ,n−1 denotes the row index of the array O_(n2), β₂=1, 2 . . . , n denotesthe column index of the array O_(n2), and k₂=1, 2, . . . , n denotesthat all elements in the k₂th column of the array O_(n2) equal k₂; as nis a prime, let a modular n of xn equal n if a_(α) ₂ _(,β) ₂ is amultiple of n, namely a_(α) ₂ _(,β) ₂ =xn(mod n)=n, where x could be anyinteger, and calculate an element of a permutation of the orbit leaderarray O_(n2) by:

a _(α) ₂ _(,β) ₂ (k ₂)=[α₂(β₂ −k ₂)+k ₂](mod n)  (iii)

O _(n2)(k ₂)={o ₁ ,o ₂ , . . . ,o _(n-1) }={{a _(α) ₂ _(,β) ₂ (k ₂)}_(α)₂ ₌₁ ^(n-1)}_(β) ₂ ₌₁ ^(n)(k ₂=1,2, . . . ,n)  (iv)

As k₂=n, equations (iii) and (iv) in method 2 can be simplified as:

a _(α,β)(n)=[α·β](mod n) for α=1,2, . . . ,n−1 and β=1,2, . . . ,n  (v)

O _(n) ={o ₁ ,o ₂ , . . . ,o _(n-1) }={{a _(α,β)(n)}_(β=1) ^(n)}_(α=1)^(n-1)=[[α·β]_(β=1) ^(n)]_(α=1) ^(n-1)(mod n)={α·o ₁}_(α=1) ^(n-1)(modn)  (vi)

Calculation of equation (vi) is the same as that of O_(n) in Theorem 2.

Example 2

Let n=5, according to the design method 1, if a_(α) ₁ _(,β) ₁ ∈Z_(n) ⁰,c₀=o₀=e=[01234], and each element of each permutation of O_(n1)(k₁) iscalculated by a_(α) ₁ _(,β) ₁ (k₁)=[(α₁+1)×(β₁−k₁)+k₁](mod n), differentorbit leader arrays can be calculated by O_(n1)(k₁) in equation (ii) asfollows as k₁=0, 1, 2, 3, 4:

$\begin{Bmatrix}{01234,} \\{02413,} \\{03142,} \\04321\end{Bmatrix}_{k_{1} = 0}\begin{Bmatrix}{01234,} \\{41302,} \\{31420,} \\21043\end{Bmatrix}_{k_{1} = 1}\begin{Bmatrix}{01234,} \\{30241,} \\{14203,} \\43210\end{Bmatrix}_{k_{1} = 2}\begin{Bmatrix}{01234,} \\{24130,} \\{42031,} \\10432\end{Bmatrix}_{k_{1} = 3}\begin{Bmatrix}{01234,} \\{13024,} \\{20314,} \\32104\end{Bmatrix}_{k_{1} = 4}$

Performing a cyclic-left-shift composite operation function (l₁)⁴ or acyclic-right-shift composite operation function (r₅)⁴ on the above fiveorbit leader arrays of O_(n1)(k₁) (k₁=0, 1, 2, 3, 4) respectively, tenequivalent permutation code sets can be obtained.

Let n=5, according to the design method 2 and a corresponding simplifiedalternative, if a_(α) ₂ _(,β) ₂ ∈Z_(n) ¹, c₁=o₁=e=[12345], and eachelement of each permutation is calculated by (iii) a_(α) ₂ _(,β) ₂(k₂)=[α₂(β₂−k₂)+k₂](mod n) or (v) a_(α,β)(n)=[α·β](mod n), differentorbit leader arrays can be calculated by O_(n2)(k₂) in equation (iv) andO_(n) in equation (vi) as follows as k₂=1, 2, 3, 4, 5:

${\begin{Bmatrix}{12345,} \\{13524,} \\{14235,} \\15432\end{Bmatrix}_{k_{2} = 1}\begin{Bmatrix}{12345,} \\{52413,} \\{42531,} \\32154\end{Bmatrix}_{k_{2} = 2}\begin{Bmatrix}{12345,} \\{41352,} \\{25314,} \\54321\end{Bmatrix}_{k_{2} = 3}\begin{Bmatrix}{12345,} \\{35241,} \\{53142,} \\21543\end{Bmatrix}_{k_{2} = 4}\begin{Bmatrix}{12345,} \\{24135,} \\{31425,} \\43215\end{Bmatrix}_{k_{2} = 5}\mspace{14mu} O_{5}} = \begin{Bmatrix}{12345,} \\{24135,} \\{31425,} \\43215\end{Bmatrix}$

Performing a cyclic-left-shift composite operation function (l₁)⁴ or acyclic-right-shift composite operation function (r₅)⁴ on five orbitleader arrays of O_(n2)(k₂) (k₂=1, 2, 3, 4, 5) and a simplified orbitleader array O₅ respectively, 12 permutation code sets obtained areequivalent to the code set of the (n,n(n−1),n−1) permutation group codeobtained by composition operations, namely, for k=1, 2, 3, 4, 5,

$P_{5} = {{C_{5}O_{5}} = {\{ {( r_{5} )^{4}{O_{52}( k_{2} )}} \} = {\{ {( l_{1} )^{4}{O_{52}( k_{2} )}} \} = {\{ {( r_{5} )^{4}O_{5}} \} = {\{ {( l_{1} )^{4}O_{5}} \} = \begin{Bmatrix}{12345,} & {24135,} & {31425,} & {43215,} \\{23451,} & {35241,} & {42531,} & {54321,} \\{34512,} & {41352,} & {53142,} & {15432,} \\{45123,} & {52413,} & {14253,} & {21543,} \\{51234,} & {13524,} & {25314,} & 32154\end{Bmatrix}}}}}}$

Part 2: Structure Design of a Generator of the (n,n(n−1),n−1)Permutation Group Code Based on Coset Partition

Illustration of the generator comprises 4 parts: generator architecture,orbit leader array generator, flash memory andcyclic-bidirectional-shift register group.

Binary Expression of a Permutation:

If m-bit binary data are used to express elements of a permutation witha length of n, the permutation can be described by a binary array ofm×n, and 2^(m-1)+1≤n≤2^(m).

Generator Architecture of the Presented Code Set

As in FIG. 1, the generator architecture of the presented code set isformed by 3 parts: an orbit leader array generator, a flash memory and acyclic-bidirectional-shift register group. A schematic circuit of theorbit leader array generator is designed based on equations (i)˜(vi), aspecific working process is performing an operation of {αo₁}_(α=1)^(n-1)(mod n) to generate an orbit leader array O_(n)={o₁, o₂, . . . ,o_(n-1)} containing n−1 permutations. The flash memory is operable forstoring an output result O_(n)={o₁, o₂, . . . , o_(n-1)} of the orbitleader array generator and an output result P_(n)={{(l₁)^(n-1)o₁},{(l₁)^(n-1)o₂}, . . . , {(l₁)^(n-1)o_(n-1)}} orP_(n)={{(r_(n))^(n-1)o₁}, {(r_(n))^(n-1)o₂}, . . . ,{(r_(n))^(n-1)o_(n-1)}} of the cyclic-bidirectional-shift registergroup. The cyclic-bidirectional-shift register group is operable forperforming an operation on a permutation by a cyclic-left-shiftcomposite operation function (l₁)^(n-1) or a cyclic-right-shiftcomposite operation function (r_(n))^(n-1) (specifically, performingcyclic shift on a permutation o_(α) to a left or right direction for n−1times) calculating an orbit {(l₁)^(n-1)o_(α)} or {(r_(n))_(n-1)o_(α)} ofan orbit leader permutation o_(α), where α=1, 2, . . . , n−1. For anorbit {(l₁)^(n-1)o_(α)} or {(r_(n))^(n-1)o_(α)} contains n permutations,a (n,n(n−1),n−1) permutation group code based on coset partition can begenerated by repeating generating process of each orbit for n−1 times,and a specific calculating equation thereof is:P_(n)=C_(n)O_(n)={(l₁)^(n-1)O_(n)}={{(l₁)^(n-1)o₁}, {(l₁)^(n-1)o₂}, . .. , {(l₁)^(n-1)o_(n-1)}} orP_(n)=C_(n)O_(n)={(r_(n))^(n-1)O_(n)}={{(r_(n))^(n-1)o₁},{(r_(n))^(n-1)o₂}, . . . , {(r_(n))^(n-1)o_(n-1)}}.

The orbit leader array generator is shown in FIG. 2 and structuralparameters thereof are designed as follows with an optimum circuitstructure. To avoid amplitude values attenuating to 0 under fadinginterference conflicting with code element 0 in a code, seta_(α,β)∈Z_(n) ¹ to ensure absence of element 0 in each permutation code,where n is an arbitrary prime. To facilitate code element tracking, letk₂=n which means that all elements of the last column of the orbitleader array are the same with a value of n, so that equation (iii) canbe simplified to an equation (v): a_(α,β)(n)=[α·β](mod n), andcalculation of the orbit leader array O_(n) can be simplified toO_(n)={o₁, o₂, . . . , o_(n-1)}={αo₁}_(α=1) ^(n-1)(mod n), where α=1, 2,. . . , n−1 representing that n−1 permutations are contained in theorbit leader array, and β=1, 2, . . . , n representing that n elementsare contained in each permutation.

The orbit leader array generator is operable for performing an operationof O_(n)={αo₁}_(α=1) ^(n-1)(mod n)={o₁, 2o₁, . . . , (n−1)o₁}(mod n) togenerate n−1 orbit leader permutations as an initial permutation iso₁=e=[12 . . . n], and transmitting each of the permutations to theflash memory right after it is generated.

The orbit leader array generator further comprises 5 parts: n parallelrunning input buffers (10), n parallel running positive integer adders(11), n parallel running mod n calculators (12), n parallel runningoutput buffers (13), an n-input single-output switch (14) and an enablesignal generator (15). Working principle of each part is describedbelow.

The n parallel running input buffers (10) are formed by n m-bit binaryregisters, each binary register stores one of n input data as an m-bitbinary data, an input and an output of each register are connected to mparallel data lines respectively, and the orbit leader generator startsto work after inputting the initial permutation o₁=e=[12 . . . n] intothe n parallel running input buffers (10). The n parallel runningpositive integer adders are operable for converting multiple operationsin O_(n)={αo₁}_(α=1) ^(n-1)={o₁, 2o₁, . . . , (n−1)o₁} to accumulatingoperations on each element of the initial permutation o₁=[12 . . . n],namely, mainly performing an operation of {αo₁}_(α=1) ^(n-1). Initialidentity permutation requires no accumulation and can be transmitteddirectly to an output buffer, so that calculation of the set {αo₁}_(α=1)^(n-1) needs n−2 accumulations. Each positive integer adder is formed bym′ binary full-adders and an m′-bit B register, with m parallel inputdata lines and m′ parallel output data lines, and m<m′≤┌log₂(n−1)²┐, aninput of the binary full-adder is operable for receiving data from theinput buffer, another input of the binary full-adder is connected to anoutput of the B register, and an output of the binary full-adder isconnected to an input of the B register. As an enable signal E=1, eachadder performs an addition between a last summation result (data in theB register) and an input of a corresponding parallel running inputbuffer (10), stores a result thereof in the B register and transmits theresult to a corresponding parallel running mod n calculator (12); as theenable signal E=0, the n parallel running positive integer adders do notwork.

The n parallel running mod n calculators (12) are operable forperforming an operation of {αo₁}_(α=1) ^(n-1)(mod n), namely, performingmod n operations on data from the B register in the n parallel runningpositive integer adders, each mod n calculator is formed by a two-inputsingle-output general mod n calculator, an m-bit C register and an m-bitD register, with m′ parallel input data lines and m parallel output datalines, an input of the general mod n calculator is connected to theoutput of the m′-bit B register through m′ parallel input data lines,another input of the general mod n calculator is connected to an outputof the m-bit C register through m parallel output data lines, an outputof the general mod n calculator is facilitated with m parallel outputdata lines, the m-bit C register is operable for storing and maintainingan m-bit binary value corresponding to n, the m-bit D register isoperable for storing output values of said general mod n calculator, anda data |x| stored in the m-bit D register is output as it is not 0,otherwise a data stored in the m-bit C register is output.

The n parallel running output buffers (13) are formed by n m-bitregisters, with the same structure as the n parallel running inputbuffers (10), operable for storing current orbit leader permutation, andas the (n−1)th buffer of the n parallel running output buffers (13) isprepared with current data, a signal is transmitted the first switch ofthe n-input single-output switch (14) so that this first switch is on.

The n-input single-output switch (14) is operable for seriallytransmitting each of the n data from the n parallel running outputbuffers (13) to a bus. m data lines of each output buffer are connectedto an m-paralleled bus by a corresponding turn-on switch, the signal ofclosing a switch is transmitted to the first switch of the n-inputsingle-output switch (14) as the (n−1) th buffer of the n parallelrunning output buffers is prepared with current data, and as the n thswitch of the n-input single-output switch is on, the final data of acodeword is transmitted to the flash memory by the bus and a high levelsignal is transmitted to an input of the enable signal generator (15).

The enable signal generator (15) is operable for providing enablesignals for the n parallel running positive integer adders (11) andformed by a binary plus 1 counter and a monostable flip-flop, with aninput line and an output line which outputs a low level at a normalstate, an input of the enable signal generator is connected to an outputcontrolling signal line of the nth switch of the n-input single-outputswitch (14), an output of the enable signal generator is connected toenable terminals of the n parallel running positive integer adders (11),as the n th switch of the n-input single-output switch (14) is on, theenable signal generator (15) is enabled, the binary plus 1 counterperforms an add-one operation, the monostable flip-flop generates a highlevel impulse with a width of a cp and transmits it to enable terminalsof the n parallel running positive integer adders (11) to set E=1, andas the nth switch of the n-input single-output switch (14) is oft theenable signal generator (15) is disabled and E=0 is maintained. As thebinary plus 1 counter performs n−1 add-one operations, the enable signalgenerator (15) outputs a low level.

The flash memory is shown in FIG. 3, which may be a read only (ROM),programmable read-only memory (PROM), an erasable programmable read-onlymemory (EPROM) or an electrically erasable programmable read-only memory(E²PROM).

In the flash memory (16), each element of a permutation is representedby an m-bit binary data, e.g. the first element of a permutation isrepresented by an m-bit binary data b_(1,1), b_(2,1), . . . , b_(m-1,1),b_(m,1), the last element of a permutation is represented by an m-bitbinary data b_(1,n), b_(2,n), . . . , b_(m-1,n), b_(m,n), b_(i,j) isbinary 0 or 1, i=0, 1, . . . , m−1, and j=0, 1, . . . , n−1. m-bitbinary data of an element of a permutation occupies m memory cellsdefined as an element storage word, a permutation occupies n elementstorage words, n−1 orbit leader permutations occupy n(n−1) elementstorage words, and n(n−1) permutation codewords occupy n²(n−1) elementstorage words. The flash memory (16) is facilitated with an m-bitparallel data input and an m-bit parallel data output. An m-bit data ofan element storage word are input in parallel as Wr=1, an m-bit data ofan element storage word are output in parallel as Rd=1, and the flashmemory (16) is disabled as Wr=0 and Rd=0.

The cyclic-bidirectional-shift register group is shown in FIG. 4. Thecyclic-bidirectional-shift register group (17) is operable forperforming an operation on a permutation by a cyclic-left-shiftcomposite operation function (l₁)^(n-1) or a cyclic-right-shiftcomposite operation function (r_(n))^(n-1) calculating an orbit{(l₁)^(n-1)o_(α)} or {(r_(n))^(n-1)o_(α)} of an orbit leader permutationo_(α), and a code set {(l₁)^(n-1)O_(n)} or {(r_(n))^(n-1)O_(n)}. Eachelement of an n-dimensional permutation vector can be expressed by anm-dimensional binary sequence and an n-dimensional permutation vectorcan be mapped into an m×n-dimensional binary array, corresponding to anm×n flip-flop array. A bidirectional register capable of shifting inboth a left direction and a right direction cyclically is formed by nflip-flops in each of the m rows, namely, n flip-flops form acyclic-bidirectional-shift register, m cyclic-bidirectional-shiftregisters are needed to form a cyclic-bidirectional-shift registergroup, e.g. the first cyclic-bidirectional-shift register is operablefor storing an n-bit binary data b_(1,1), b_(1,2), . . . , b_(1,n-1),b_(1,n) and the m th cyclic-bidirectional-shift register is operable forstoring an n-bit binary data b_(m,1), b_(m,2), . . . , b_(m,n-1),b_(m,n) (it should be noted that the array herein is m×n dimensional,and the flash memory (16) corresponds to an array of n×m). A switch (18)is serially connected to each of the cyclic-left-shift loops, m switchesoperates in parallel, a cyclic-left-shift operation is performed on mdata in parallel by connecting the m switches, and a left-shift inputoperation and a left-shift output operation are performed on m data inparallel by disconnecting the m switches, and two inputs REG-in andREG-out are facilitated to provide four groups of control signals 00,01, 10 and 11 corresponding to four working states of thecyclic-bidirectional-shift register group: left-shift input, left-shiftoutput, cyclic-left-shift and cyclic-right-shift. Working process of thecyclic-bidirectional-shift register group (17) is described below.

Process a: input a permutation. As REG-in=0, REG-out=0 and Rd=1, the mparallel switches (18) of the cyclic-left-shift loops are disconnected,the first orbit leader permutation of the flash memory (16) istransmitted to the cyclic-bidirectional-shift register group (17),namely, the cyclic-bidirectional-shift register group performs anleft-shift-input operation on m-bit binary in parallel in n times.

Process b: generate a new permutation by cyclic-left-shift. As REG-in=0and REG-out=1, the m parallel switches (18) of the cyclic-left-shiftloops are connected, and the cyclic-bidirectional-shift register group(17) performs a cyclic-left-shift operation on m-bit binary in parallelin n times to generate a new permutation.

Process c: output a permutation. As REG-in=1, REG-out=0 and Wr=1, the mparallel switches (18) of the cyclic-left-shift loops are connected, thecyclic-bidirectional-shift register group (17) performs the followingtwo operations: transmitting a current permutation generated by Processb to the flash memory (16) by the left-shift-output operation on m-bitbinary in parallel in n times, and performing a cyclic-left-shiftoperation on m-bit binary in parallel in n times, so that a permutationgenerated by Process b may be reserved.

Process d: generate an orbit {(l₁)_(n-1)o_(α)}. It is formed by acombination of Process b and Process c with the m parallel switches (18)closed. Process b and Process c work alternately: this is that during animpulse of cp, REG-in=0 and REG-out=1, the cyclic-bidirectional-shiftregister group (17) performs a cyclic-left-shift operation of m-bit inparallel to generate a new permutation, and during each of the followingn impulses of cp, REG-in=1, REG-out=0 and Wr=1, thecyclic-bidirectional-shift register group (17) simultaneously performs aleft-shift operation to output a current permutation to the flash memory(16) for storage and a cyclic-left-shift operation to maintain thispermutation by m-bit in parallel in n times. Process d is equivalent toperforming an operation of (l₁)^(n-1) on an orbit leader permutationo_(α) to generate an orbit {(l₁)^(n-1)o_(α)}, and storing n−1permutations generated by the orbit {(l₁)^(n-1)o_(α)} in the flashmemory (16).

Process e: generate a code set {(l₁)^(n-1)O_(n)}. It is formed by acombination of Process a and Process d, and a code set {(l₁)^(n-1)O_(n)}of a (n,n(n−1),n−1) permutation group code based on coset partition isgenerated by repeating Process e for n−1 times.

Process b′: generate a new permutation by cyclic-right-shift. AsREG-in=1 and REG-out=1, the m parallel switches (18) of thecyclic-left-shift loops are disconnected, and thecyclic-bidirectional-shift register group (17) performs acyclic-right-shift operation on m-bit in parallel of length n togenerate a new permutation.

Process d′: generate an orbit {(r_(n))^(n-1)o_(α)}. It is formed by acombination of Process b′ and Process c, equivalent to generating anorbit {(r_(n))^(n-1)o_(α)} of a permutation o_(α) and storing the orbit{(r_(n))^(n-1)o_(α)} in the flash memory (16).

Process e′: generate a code set {(r_(n))^(n-1)O_(n)}. It is formed by acombination of Process a and Process d′, and a code set{(r_(n))^(n-1)O_(n)} of a (n,n(n−1),n−1) permutation group code based oncoset partition is generated by repeating Process e′ for n−1 times.

While preferred embodiments of the invention have been described above,the invention is not limited to disclosure in the embodiments and theaccompanying drawings. Any changes or modifications without departingfrom the spirit of the invention fall within the scope of the invention.

What is claimed is:
 1. A construction method of the (n,n(n−1),n−1)permutation group codes based on coset partition, wherein a constructionof this permutation code with a code length of n, a minimum distance ofn−1 and a code size of n(n−1) is expressed by P_(n)={{p_(β60)}_(β=1)^(n)}_(α=1) ^(n-1)=C_(n)O_(n)={{C_(n)o₁}, {C_(n)o₂}, . . . ,{C_(n)o_(n-1)}}={{c_(β)∘o_(α)}_(β=1) ^(n)}_(α=1) ^(n-1),P_(n)=C_(n)O_(n) represents that C_(n) is a coset of the subgroup O_(n)and O_(n) is also a coset of the subgroup C_(n), P_(n)={{C_(n)o₁},{C_(n)o₂}, . . . , {C_(n)o_(n-1)}} represents dividing P_(n) into n−1cosets by the subgroup C_(n), each coset {C_(n)o_(α)} forms an orbit oran cyclic Latin square (C-LS) of a permutation o_(α),P_(n)={{p_(βα)}_(β=1) ^(n)}_(α=1) ^(n-1)={{c_(β)∘o_(α)}_(β=1)^(n)}_(α=1) ^(n-1) represents a permutation code and each codewordp_(βα) is generated by composition operation of a permutation c_(β) ofthe subgroup C_(n) and a permutation o_(α) of the subgroup O_(n), α=1,2, . . . n−1, and β=1, 2, . . . n.
 2. The construction method of the(n,n(n−1),n−1) permutation group code of claim 1, wherein C_(n) isreplaced by a cyclic-left-shift composite operation function (l₁)^(n-1)or a cyclic-right-shift composite operation function (r_(n))^(n-1), andcomposition operation of the subgroups C_(n) and O_(n) is converted intothe cyclic shift operation implemented by hardward circuit; and theoperation of replacing C_(n) by (l₁)^(n-1) or (r_(n))^(n-1) furthercomprises: implementing an orbit {C_(n)o_(α)} of a permutationo_(α)∈O_(n) by an equivalent expression{C_(n)o_(α)}={(r_(n))^(n-1)o_(α)}={(l₁)^(n-1)o_(α)}, where α=1, 2, . . .n−1, and implementing P_(n)=C_(n)O_(n) by an equivalent expressionP_(n)=C_(n)O_(n)={(r_(n))^(n-1)O_(n)}={{(r_(n))^(n-1)o₁},{(r_(n))^(n-1)o₂}, . . . , {(r_(n))^(n-1)o_(n-1)}} orP_(n)=C_(n)O_(n)={(l₁)^(n-1)O_(n)}={{(l₁)^(n-1)o₁}, {(l₁)^(n-1)o₂}, . .. , {(l₁)^(n-1)o_(n-1)}}.
 3. The construction method of the(n,n(n−1),n−1) permutation group code of claim 1, wherein the subgroupO_(n) is equivalent to an orbit leader array, and a construction methodthereof comprises steps of: if a permutation contains element 0: leta_(α) ₁ _(,β) ₁ ∈Z_(n) ⁰={0, 1, . . . , n−1} denote an element in theα₁th row and the β₁th column of an array O_(n1), where α₁=0, 1, . . . ,n−2 denotes the row index of the array O_(n1), β₁=0, 1, . . . , n−1denotes the column index of the array O_(n1), and k₁=0, 1, . . . , n−1indicates that all elements in the k₁th column of the array O_(n1) equalk₁; setting a_(α) ₁ _(,β) ₁ =xn(mod n)=0 as n is a prime, where x is aninteger; and calculating each element of each permutation of the arrayO_(n1) by a_(α) ₁ _(,β) ₁ (k₁)=[(α₁+1)×(β₁−k₁)+k₁](mod n) andcalculating all permutations of the array O_(n1) by O_(n1)(k₁)={o₀, o₁,. . . , o_(n-2)}={{a_(α) ₁ _(,β) ₁ (k₁)}_(α) ₁ ₌₀ ^(n-2)}_(β) ₁ ₌₀^(n-1); or if a permutation contains no element 0: setting a_(α) ₂ _(,β)₂ ∈Z_(n) ¹={1, 2, . . . , n} representing an element in the α₂ th rowand the β₂th column of an array O_(n2), where α₂=1, 2, . . . , n−1representing row index of the array O_(n2), β₂=1, 2 . . . , nrepresenting column index of the array O_(n2), and k₂=1, 2, . . . , nrepresenting that all elements in the k₂ th column of the array O_(n2)equal k₂; setting a_(α) ₂ _(,β) ₂ =xn(mod n)=n as n is a prime, where xis an integer; and calculating each element of each permutation of thearray O_(n2) by a_(α) ₂ _(,β) ₂ (k₂)=[α₂(β₂−k₂)+k₂](mod n) andcalculating all permutations of the array O_(n2) by O_(n2)(k₂)={o₁, o₂,. . . , o_(n-1)}={{a_(α) ₂ _(,β) ₂ (k₂)}_(α) ₂ ₌₁ ^(n-1)}_(β) ₂ ₌₁ ^(n);and setting k₂=n and a_(α,β)∈Z_(n) ¹={1, 2, . . . , n}, calculating eachelement of each permutation of the array O_(n2) by a simplifiedexpression a_(α,β)(n)=[α·β](mod n) and calculating all permutations ofthe array O_(n2) by a simplified expression O_(n)={o₁, o₂, . . . ,o_(n-1)}={αo₁}_(α=1) ^(n-1)(mod n), where o₁=e=[a₁a₂ . . . a_(n)]=[12 .. . n], a₁, a₂, . . . , a_(n)∈Z_(n) ¹, α=1, 2, . . . n−1 and β=1, 2, . .. n.
 4. A generator of the (n,n(n−1),n−1) permutation group code basedon coset partition, comprising an orbit leader array generator, a flashmemory and a cyclic-bidirectional-shift register group, wherein saidorbit leader array generator is operable for performing an operation ofO_(n)={αo₁}_(α=1) ^(n-1)(mod n) to generate n−1 orbit leaderpermutations; said flash memory is operable for storing output resultsof said orbit leader array generator and said acyclic-bidirectional-shift register group; and said acyclic-bidirectional-shift register group is operable for performing theoperation of (l₁)^(n-1) or (r_(n))^(n-1) acting on a permutation bycalculating the orbit {(l₁)^(n-1)o_(α)} or {(r_(n))^(n-1)o_(α)} of anorbit leader permutation o_(α) and a code set {(l₁)^(n-1)O_(n)} or{(r_(n))^(n-1)O_(n)}, where α=1, 2, . . . , n−1.
 5. The generator of the(n,n(n−1),n−1) permutation group code of claim 4, wherein said orbitleader array generator is operable for calculating n−1 orbit leaderpermutations by O_(n)={αo₁}_(α=1) ^(n-1)(mod n)={o₁, 2o₁, . . . ,(n−1)o₁}(mod n) as an initial input permutation is an identitypermutation expressed by o₁=e=[12 . . . n] and storing calculatingresults in ROM thereof; and said orbit leader array generator furthercomprises n parallel running input buffers, n parallel running positiveinteger adders, n parallel running mod n calculators, n parallel runningoutput buffers, an n-input single-output switch and an enable signalgenerator, wherein said n parallel running input buffers are formed by nm-bit binary registers, an input and an output of each register areconnected to m parallel data lines respectively, and 2^(m-1)+1≤n≤2^(m);said n parallel running positive integer adders are operable forperforming an operation of {αo₁}_(α=1) ^(n-1), each positive integeradder is formed by m′ binary full-adders and an m′-bit B register, withm parallel input data lines and m′ parallel output data lines, andm<m′≤┌log₂(n−1)₂┐, an input of said binary full-adder is operable forreceiving data from said input buffer, another input of said binaryfull-adder is connected to an output of said B register, an output ofsaid binary full-adder is connected to an input of said B register, andsaid n parallel running positive integer adders are enabled as an enablesignal E=1 and disabled as the enable signal E=0; said n parallelrunning mod n calculators are operable for performing an operation of{αo₁}_(α=1) ^(n-1)(mod n), each mod n calculator is formed by atwo-input single-output general mod n calculator, an m-bit C registerand an m-bit D register, with m′ parallel input data lines and mparallel output data lines, an input of said general mod n calculator isconnected to the output of said m′-bit B register through m′ parallelinput data lines, another input of said general mod n calculator isconnected to an output of said m-bit C register through m paralleloutput data lines, an output of said general mod n calculator isfacilitated with m parallel output data lines, said m-bit C register isoperable for storing and maintaining an m-bit binary value correspondingto n, said m-bit D register is operable for storing output values ofsaid general mod n calculator, and a data stored in said m-bit Dregister is output as it is not 0, otherwise a data stored in said m-bitC register is output; said n parallel running output buffers are formedby nm-bit registers, an input and an output of each m-bit register areconnected to m parallel data lines respectively, and as the (n−1)thbuffer of said n parallel running output buffers is prepared withcurrent data, this buffer sends a signal to the first switch of saidn-input single-output switch; said n-input single-output switch isoperable for serially transmitting each of the n data from said nparallel running output buffers to a bus, m data lines of said outputbuffer are connected to an m-paralleled bus by connecting acorresponding switch, a connecting signal of said the first switch ofsaid n-input single-output switch is a control signal output from saidthe (n−1)th buffer of said n parallel running output buffers, and a highlevel signal is transmitted to an input of said enable signal generatoras the nth switch of said n-input single-output switch is on; saidenable signal generator is operable for providing enable signals forsaid n parallel running positive integer adders and formed by a binaryplus 1 counter and a monostable flip-flop, with an input signal line andan output signal line of maintaining a low level at a normal state, aninput of said binary plus 1 counter is connected to an output signalline of said the nth switch of said n-input single-output switch andreceives a control signal as said the nth switch is on, said binary plus1 counter performs an add-one operation and said monostable flip-flopgenerates a high level impulse with a width of a cp, and transmits saidimpulse to enable terminals of said n parallel running positive integeradders through the output line, and as said binary plus 1 counterperforms n−1 add-one operations, said monostable flip-flop generates noimpulse and said enable signal generator outputs a low level.
 6. Thegenerator of the (n,n(n−1),n−1) permutation group code of claim 4,wherein said the cyclic-bidirectional-shift register group is operablefor realizing an orbit {(l₁)^(n-1)o_(α)} or {(r_(n))^(n-1)o_(α)} and acode set {(l₁)^(n-1)O_(n)} or {(r_(n))^(n-1)O_(n)} and formed by aflip-flop array of m rows and n columns, a bidirectional registercapable of cyclic-shifting to both the left and the right is formed by nflip-flops in each row of m rows, each of m switches is connected toeach of the cyclic-left-shift loops, m switches operates in parallel, mbinary are cyclic-left-shifted in parallel through closing m switches,and m binary are left-shifted to input or output in parallel by openingm switches, and two ports REG-in and REG-out are facilitated to providefour groups of control signals 00, 01, 10 and 11 corresponding to fourworking states of said cyclic-bidirectional-shift register group:left-shift-input, left-shift-output, cyclic-left-shift andcyclic-right-shift.